3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
74AC573NSR SN74AC573NSR CD74AC574E CD74AC574M CD74AC574M96 SN74AC574NSR SN74AC574NSR CD74AC646M CD74AC646M96 CD74ACT00E CD74ACT00M SN74ACT00PW SN74ACT00PWR CD74ACT00M96 CD74ACT00E CD74ACT00M CD74ACT00M96 CD74ACT00M96 SN74ACT00NSR SN74ACT00NSR SN74ACT00PWR CD74ACT02E CD74ACT02M CD74ACT02M96 CD74ACT02E CD74ACT02M CD74ACT02M96 CD74ACT04E CD74ACT04M SN74ACT04PW SN74ACT04PWR CD74ACT04M96 CD74ACT04E CD74ACT04M CD74ACT04M96 SN74ACT04NSR SN74ACT04NSR Texas Instruments Orderable Comments Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-in Not "Quiet" outputs, but otherwise drop-i
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
C02A SN74LVC02A Logic N/A Logic N/A Logic N/A Logic N/A Logic N/A Logic N/A Logic N/A SN74AHC02 SN74LV02A SN74AHC02 SN74AHC02 SN74LV02A SN74AHC02 SN74AHC02 SN74AHC02 SN74LV02A SN74AHC02 SN74AHC02 SN74AHC02 SN74LV02A TI Orderable Part # Logic N/A Logic N/A CD74ACT02E CD74ACT02M Logic N/A Logic N/A CD74ACT02M96 CD74ACT02E CD74ACT02M CD74ACT02M96 Logic N/A SN74AHC02D SN74AHC02DR SN74AHC02PW SN74AHC02PWR SN74AHCT02D SN74AHCT02DR SN74AHCT02PW SN74AHCT02PWR CD74HC02M SN74HC02DBR SN74HC02DBR CD74HC02M96 CD74HC02E SN74HC02PW SN74HC02PWR CD74HCT02M Logic N/A Logic N/A CD74HCT02M96 CD74HCT02E SN74HCT02PW SN74HCT02PWR SN74LVC02AD SN74LVC02AD SN74LVC02APWR SN74LVC02APWR SN74LVC02ADR SN74LVC02ADR SN74LVC02ANSR SN74LVC02ANSR SN74LVC02APWR SN74LV02AD SN74LV02ADR Not available SN74LVC02AD SN74LVC02ADB SN74LVC02ADB SN74LVC02ADR SN74LVC02APW SN74LVC02APWR TI Comments This package This package This package This package This package -55 to 125C Not available in tubes, use DBR -40 to 85C -55 to 125C -55
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
in tubes, use NSR This package This package This package Fairchild Semiconductor to TI Root 2 2 2 2 2 2 2 Fairchild Orderable 74AC02SJX 74ACT02MTC 74ACT02MTCX 74ACT02PC 74ACT02SC 74ACT02SCX DM74ALS02M TI Orderable Not available Not available Not available CD74ACT02E CD74ACT02M CD74ACT02M96 SN74ALS02AD Pins 14 14 14 14 14 14 14 TI Comments This package This package This package 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 MM74C02N MM74HC02M MM74HC02MX 74LCX02M 74LCX02MTC 74LCX02MTCX 74LCX02MX 74LCX02SJ 74LCX02SJX DM74LS02M DM74LS02MX DM74LS02N DM74LS02SJ DM74LS02SJX 74LVQ02SC 74LVQ02SCX 74LVQ02SJ 74LVQ02SJX Not available SN74HC02D SN74HC02DR SN74LVC02AD SN74LVC02APWR SN74LVC02APWR SN74LVC02ADR SN74LVC02ANSR SN74LVC02ANSR SN74LS02D SN74LS02DR SN74LS02N SN74LS02NSR SN74LS02NSR Not available Not available Not available Not available 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 2 74LVX02M SN74LV02AD 14 2 74LVX02MTC SN74LV02APW 14 2 74LVX02MTCX SN74LV02APWR 14 2 74LVX02MX SN74LV02ADR 14 2 74LVX02SJ SN7
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
in tubes, use NSR This package This package This package Fairchild Semiconductor to TI Root 2 2 2 2 2 2 2 Fairchild Orderable 74AC02SJX 74ACT02MTC 74ACT02MTCX 74ACT02PC 74ACT02SC 74ACT02SCX DM74ALS02M TI Orderable Not available Not available Not available CD74ACT02E CD74ACT02M CD74ACT02M96 SN74ALS02AD Pins 14 14 14 14 14 14 14 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 MM74C02N MM74HC02M MM74HC02MX 74LCX02M 74LCX02MTC 74LCX02MTCX 74LCX02MX 74LCX02SJ 74LCX02SJX DM74LS02M DM74LS02MX DM74LS02N DM74LS02SJ DM74LS02SJX 74LVQ02SC 74LVQ02SCX 74LVQ02SJ 74LVQ02SJX Not available SN74HC02D SN74HC02DR SN74LVC02AD SN74LVC02APWR SN74LVC02APWR SN74LVC02ADR SN74LVC02ANSR SN74LVC02ANSR SN74LS02D SN74LS02DR SN74LS02N SN74LS02NSR SN74LS02NSR Not available Not available Not available Not available 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 2 74LVX02M SN74LV02AD 14 2 74LVX02MTC SN74LV02APW 14 2 74LVX02MTCX SN74LV02APWR 14 2 74LVX02MX SN74LV02ADR 14 2 74LVX02SJ SN74LV02ANSR 14 TI tpd generally slightly slower, high
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub
3A description The 'ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic. ORDERING INFORMATION PDIP - E -55C 55C to 125C ORDERABLE PART NUMBER PACKAGE TA SOIC - M CDIP - F Tube CD74ACT02E Tube CD74ACT02M Tape and reel CD74ACT02M96 Tube CD54ACT02F3A TOP-SIDE MARKING CD74ACT02E ACT02M CD54ACT02F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each gate) INPUTS A B OUTPUT Y H X L X H L L L H logic diagram (positive logic) 1A 1B 2A 2B 2 1 3 5 6 1Y 3A 3B 4 2Y 4A 4B 8 10 9 11 12 13 3Y 4Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of pub