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Electrically Programmable Analog Device (Epad) Applications
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User Programmable Offset Voltage (VOS) of Epad Operational Applications
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ASIC Design Guidelinges , This document constitutes a general set of recommendations intended for use by designers when preparing circuits for fabrication by Atmel. The guidelines are independent of any particular CAD tool or silicon process. They are a
12 Pages, 185 KB, Original
The Benefits of Atmels RAPID Programming Algorithm , This Application Note details the Atmel RAPID programming algoarithm and briefly explains why this algorithm is superior to others. In addition, it will give an introduction to EPROM technology and th
5 Pages, 119 KB, Original
Implementing Cache Logic with FPGAs , This Application Note describes our enabling technology to make adaptive hardware possible for electronics systems.
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Recommended Reprogramming Procedure for Atmels Flash Memories , This Application Note describes the recommended reprogramming procedure for some of Atmels flash memories
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Designing in Split Power Supply Support for AT94KAL-AX and AT94SAL-AX Devices
8 Pages, 68 KB, Original
Mixing C and Assembly Code with IAR Embedded Workbench for FPSLIC , This Application Note describes how to use C to control the program flow and main program and assembly modules to control time-critical I-O functions.
19 Pages, 124 KB, Original
Converting FPGAs and PLDs to Atmel Gate Arrays , This Application Note discusses some factors to consider when deciding to convert, describes the conversion process, and details the required information for selected FPGA and PLD products.
4 Pages, 34 KB, Original
Software Chip Erase , Atmel EEPROMs feature Software Chip Erase which allows erasure of the entire memory contents in one step using a 6-byte code.
8 Pages, 115 KB, Original
Power Metering Front End Design: The Delta Connection , This Application Note describes how to implement the chipset in three-phase, three-wire environments.
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CMX867 - V.22 Full-Duplex Call Set-up on the CMX867
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XRT7300 DS3-E3-STS-1 LIU IC Power Conditioning Requirements
53 Pages, 228 KB, Original
Designing the XRT71D00 and the XRT73L00 Devices to Operate in the Host Mode, and to be Accessed via a Single Chip Select Pin.
15 Pages, 108 KB, Original
XRT73L04 4-Channel DS3-E3-STS-1 LIU IC Power Conditioning Requirements
2 Pages, 93 KB, Original
General Application Note for ST49Cxxx Clock Family
8 Pages, 68 KB, Original
How to Use the Worlds Smallest 24-Bit No Latency Delta-SigmaTM ADC to its Fullest Potential
52 Pages, 520 KB, Original
A Standards Lab Grade 20-Bit DAC with 0.1ppm-°C Drift
4 Pages, 111 KB, Original
Ceramic Input Capacitors Can Cause Overvoltage Transients
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Low-Voltage Operation of the MIC5014 Family (MIC5014)