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ASIC Design Guidelinges , This document constitutes a general set of recommendations intended for use by designers when preparing circuits for fabrication by Atmel. The guidelines are independent of any particular CAD tool or silicon process. They are a
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The Benefits of Atmels RAPID Programming Algorithm , This Application Note details the Atmel RAPID programming algoarithm and briefly explains why this algorithm is superior to others. In addition, it will give an introduction to EPROM technology and th
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Implementing Cache Logic with FPGAs , This Application Note describes our enabling technology to make adaptive hardware possible for electronics systems.
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Recommended Reprogramming Procedure for Atmels Flash Memories , This Application Note describes the recommended reprogramming procedure for some of Atmels flash memories
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Mixing C and Assembly Code with IAR Embedded Workbench for FPSLIC , This Application Note describes how to use C to control the program flow and main program and assembly modules to control time-critical I-O functions.
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Converting FPGAs and PLDs to Atmel Gate Arrays , This Application Note discusses some factors to consider when deciding to convert, describes the conversion process, and details the required information for selected FPGA and PLD products.
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Software Chip Erase , Atmel EEPROMs feature Software Chip Erase which allows erasure of the entire memory contents in one step using a 6-byte code.
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Power Metering Front End Design: The Delta Connection , This Application Note describes how to implement the chipset in three-phase, three-wire environments.
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Application of Module for Bidirectional Optical Transmission
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